1. Field of the Invention
The present invention relates to power supplies for integrated circuits, and more particularly to decoupling capacitors for high voltage supplies for DRAM circuit arrays.
2. Background Art
U.S. Pat. No. 5,612,613 issued Mar. 18, 1997 to Dutt et al. entitled REFERENCE VOLTAGE GENERATION CIRCUIT discloses a circuit for rectifying and AC input voltage using a composite input voltage derived from the AC input voltage and composed of a scaled AC input voltage shifted by a selected DC bias voltage.
U.S. Pat. No. 5,592,421 issued Jan. 7, 1997 to Kaneko et al. entitled SEMICONDUCTOR INTEGRATED CIRCUIT FOR GENERATING AN INTERNAL POWER SOURCE VOLTAGE WITH REDUCED POTENTIAL CHANGES discloses a circuit device that restricts changes in a power source potential when an externally applied power source potential changes.
U.S. Pat. No. 5,221,864 issued Jun. 22, 1993 to Galbi et al. entitled STABLE VOLTAGE REFERENCE CIRCUIT WITH HIGH VT DEVICES discloses a voltage reference circuit that produces an output offset from a supply voltage, the output being relatively stable regardless of variations in external power supplies.
U.S. Pat. No. 4,929,848 issued May. 29, 1990 to Gulezynski entitled HIGH ACCURACY REFERENCE LADDER discloses a reference ladder circuit comprising capacitors coupled in series that produces a plurality of reference signals having high accuracy.
U.S. Pat. No. 4,837,457 issued Jun. 6, 1989 to Bergstrom et al. entitled HIGH VOLTAGE POWER TRANSISTOR CIRCUITS discloses a circuit comprising a pair of transistors serially connected through an inductor to a supply voltage. Other components are connected to the transistors which determine various periods of operation. A phase comparator is included having an output that is used to ensure the required simultaneous non-conduction of the transistors.
An object of the present invention is to provide an improved dynamic random access memory (DRAM) power supply for integrated circuits.
Another object of the present invention is to provide an improved power supply for integrated circuits including a lower voltage limit capacitor configuration.
Still another object of the present invention is to provide an improved DRAM power supply using series connected array capacitors having lower voltage limits to provide decoupling capacitance to higher operating voltage power supplies.
Other features, advantages and benefits of the present invention will become apparent in the following description taken in conjunction with the following drawings. It is to be understood that the foregoing general description and the following detailed description are exemplary and explanatory but are not to be restrictive of the invention. The accompanying drawings which are incorporated in and constitute a part of this invention and, together with the description, serve to explain the principles of the invention in general terms. Like numerals refer to like parts throughout the disclosure.